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February 15, 2001
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By Michael Kanellos
February 14, 2001
C/Net
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W.J. "Jerry" Sanders will step down as chief executive officer of Advanced Micro Devices in April 2002 and hand control of the company to his hand-picked successor.
The Sunnyvale, Calif.-based chipmaker said Wednesday that the flamboyant Sanders, who founded the company in 1968, will serve as CEO until the annual shareholders meeting in April 2002. At that time, the office will be handed over to Hector de J. Ruiz, AMD's current president and chief operating officer.
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By James Middleton
February 14, 2001
VNUNet
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Intel was left red faced this morning after a sub-domain on its website was defaced by opportunist hackers.
A hacking group known as the Sm0ked Crew managed to deface an Intel sub-domain at talisman1.cps.intel.com leaving a short message greeting other hackers. Intel pointed out that the hackers failed to upload any HTML. The site is running Microsoft IIS4 on Windows NT4 - a combination that has been subjected to a raft of exploits in recent weeks.
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By Will Garside
February 15, 2001
Computer Weekly
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A peer-to-peer (P2P) working group has elected a non-Intel chairman amid concerns about its domination by the chip giant.
The group of 40 companies has elected Brian Morrow, chief executive of P2P specialist Endeavors, to head its steering group.
The group, which plans to hammer out standards for interoperability, application development, network management and security, elected
Morrow in place of rival Intel candidate and group founder Bob Knighten.
Knighten, who directs peer-to-peer architecture in Intel's microprocessor research lab, will chair the group's technical
architecture council instead.
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By Reuters
February 13, 2001
San Jose Mercury News
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Just nine months after its launch, Intel Corp. is quietly closing down a streaming media content business that the world's largest chipmaker said would serve an estimated $2.5 billion market by 2004.
Intel, Santa Clara, Calif., announced the effort -- Intel Internet Media Services -- in May 2000 and said then it would spend $200 million to build an Internet media business that would allow customers to transmit everything from movies to conferences to online training via the Internet.
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By Michael Kanellos
February 13, 2001
C/Net
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A German court has delayed a trial between Rambus and two memory manufacturers because of procedural issues, the company said Tuesday.
The trial--which pits the Mountain View, Calif.-based memory designer against memory manufacturers Micron Technology and Hyundai--centers on the validity and application of nine memory patents owned by Rambus that date back to 1990.
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By Mike Clendenin
February 14, 2001
EE Times
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Advanced Micro Devices Inc. officially rolled out its HyperTransport high-speed bus technology at the Taiwan Platform Conference on Wednesday (Feb. 14) and said it has gathered more than 100 companies, including Sun Microsystems, Broadcom, Nvidia and Cisco Systems, to help lay down the infrastructure for the bus' industry acceptance.
AMD has been working on HyperTransport, formerly code-named Lightning Data Transport, for more than three years. It is intended as a point-to-point solution that will enable processors in PCs, networking and communications devices to talk with each other 24 times faster than with current technologies.
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By John G. Spooner
February 14, 2001
C/Net
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Advanced Micro Devices aims to increase the performance of PCs and other computing devices with an internal connection that increases the both the speed and amount of data that get ferried between chips.
The new connection, dubbed HyperTransport, will be licensed royalty free to manufacturers and, so far, the concept is gaining interest. Cisco Systems, Sun Microsystems, Microsoft and others are looking at it, according to AMD.
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The Register Files
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By Tony Smith
February 14, 2001
The Register
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VIA will debut the next version of its Cyrix III processor, based on the upcoming Samuel II core, next month, as predicted.
And the company confirmed and clarified what we've heard about Samuel II's successor, Ezra, also
known by its internal codename, C5C.
Samuel II's codename was C5B. It adds 64KB of on-die L2 cache to the 128KB of on-die L1, a long-time feature of
IDT/Centaur's WinChip CPUs, which VIA acquired a couple of years back. The part will ship at 750MHz, just above the 700MHz Cyrix III VIA sneaked out last month. 800MHz and 850MHz Samuel II-based parts will follow soon, the company said, and all three versions of the new chip will support 100MHz and 133MHz frontside bus speeds.
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February 12, 2001
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By Ken Popovich
February 8, 2001
eWEEK
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The world's largest chip makers touted their most powerful processors at an industry gathering in San Francisco this week, but perhaps just as noteworthy was a high-profile no-show.
Following presentations featuring IBM's upcoming 1.1GHz Power4 and Compaq Computer Corp.'s future 1.2GHz Alpha, a conference guide indicated that Intel Corp. would discuss its follow-up product to Itanium, a 64-bit processor code-named McKinley.
But Intel pulled its presentation.
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By Jack Robertson
February 9, 2001
Electronic Buyers' News
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Intel Corp. will accelerate the debut of its double-data-rate
SDRAM-enabled chipset for the Pentium 4 microprocessor, pulling in the launch date from the first quarter of 2002 to October of this year, said sources with
knowledge of the company's plans.
The revised introduction date of the so-called Brookdale chipset also could see Intel drop plans for a single-data-rate version of the device, according to sources at last week's DDR Summit II here.
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By Bloomberg News
February 8, 2001
C/Net
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Toshiba and NEC plan to increase the number of high-speed computer memory chips they produce to meet an expected rise in demand, Tokyo's Nikkei English News said, citing unidentified industry sources.
Toshiba is to raise production of Dynamic Random Access Memory (DRAM) based on Rambus designs to 8 million a month from 2.3 million in September, NEN said. The Rambus
chips, which can transfer data at twice the speed of standard DRAM, is to comprise 60 percent of Toshiba's total production, NEN said.
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The Register Files
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By Andrew Orlowski
February 9, 2001
The Register
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Intel will be introducing SMT into their Foster chips in the summer, sources close to the project have confirmed to The Register. And with Project Jackson, its codename at Satan Clara, Intel will break with its traditional approach to microprocessor design by introducing
SMT, or 'simultaneously multithreading', which presents two "virtual" processors to software application.
Jackson was first referred to by our very own Mike Magee last September here, in a scoop that mentioned multi-threading capabilities being built into Foster, the first chip to be based on Intel's P7 core that's used in Pentium IV.
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