 In-Depth
Articles
Introduction to the Streaming SIMD Extensions in
the Pentium III: Part I
By Bipin Patwardhan
Introduction to the Streaming SIMD
Extensions in the Pentium III: Part II
Introduction to the Streaming SIMD
Extensions in the Pentium III: Part III
The Pentium III and Pentium III Xeon
weren't just faster than their predecessors, they are enriched
with many new features. These new features include a unique
processor ID and new processor instructions. These new
instructions add to the Pentium III what MMX added to the Pentium
II. Using these features, application developers can create
better content for end-users.
In this article, we introduce you to the
Pentium III and briefly its features, concentrating on the
details of the new instructions.
AMD 3DNow! undocumented instructions By Grzegorz Mazur
Recently, three undocumented 3DNow!
instructions were found on the AMD K6 microprocessor. Were
these instructions a design artifact (hardly not). The
description of these instructions originally appeared in early
3DNow! design documentation and was removed shortly
thereafter. Strangely, these instructions still appear in
the AMD K6 microprocessors, but not those by Cyrix or
IDT/Centaur.
Branch Prediction in the Pentium
Family by
Agner Fog
This article
describes how the branch prediction mechanism in the Pentium has
been uncovered with all its quirks, and the incredibly more
effective branch prediction in the later microprocessor versions.
PC
Processors Explained By Robert R. Collins
Welcome Computalk readers.
This article was prepared Tom King
at Computalk.COM. This brief article provides an overview of the
various generations of x86 microprocessors.
Chipsets: The Most important components
in a computer system
by Billy Newsom
(Following this link will take you away
from this web site.)
Have you ever wondered how much difference
a chipset makes in the performance of your computer system? This
definitive article was submitted by one of my readers. Billy
offered, and took it upon himself to write this excellent, and
thorough article about computer chipsets, and their relationship
to the performance of your computer system.
Have you ever wondered how the
BIOS sizes memory? If you have, then you'll want to take a look
at this article. In this article, I discuss the basic method
which the BIOS uses to determine how many banks of memory, and
the size of each DRAM chips.
This article discloses the last piece of
Appendix H information which has not already been disclosed at
this web page. Protected Mode Virtual Interrupts (PVI) is
supposed to be the protected mode counterpart to VME (Virtual
Mode Enhancements, discussed below). However well intentioned
Intel was in providing this feature, it's still rather brain-dead
and doesn't solve the problem caused by POPF (or IRET) when the
EFLAGS image of the interrupt flag needs to be changed.
Regardless of the limitations of PVI, this article is invaluable
for understanding this secret Pentium feature. The article
comes complete with source code and a downloadable executable to
demonstrate this feature.
In order to receive information from Intel
regarding the Pentium's 4 MB Page Size Extensions, Intel required
you to sign a 15-year NDA. But little did you know that for the
past three years, this information has been publicly documented
in the Intel i860 XP manual. How ironic!
This article is excerpts from an extensive article I wrote on
this subject. Currently, publication rights with a magazine (or
two) haven't been ironed out. Therefore, I am unable to publish
the entire article. Don't be dismayed, these excerpts will give
you enough information and source code to understand all of the
pertinent details.
It has taken over four years for this
information to be liberated from Appendix H. The people who knew
it, couldn't talk about it. Those who didn't know it, wanted it.
Now it is finally here: all of the details of the Virtual Mode
Extensions on the Pentium Processor. Abundant source code
examples are provided as well.
Most people never knew that the Pentium
Processor was going to implement 36-bit addressing, and 2-Mbyte
pages. As far as I know, these features were implemented in beta
silicon, but scrapped for production. Well, they're back on the
Pentium Pro Processor, with some other page mode extensions.
This is an excellent article by Ralf Brown,
the author of the Interrupt List. In
this article, Ralf unlocks the secrets to hidden model-specific
registers on the Pentium processor and discloses what they
contain.
This article gives a brief overview of how
the Pentium Probe Mode works. What is probe mode used for? How
does it work? How does it interface with the Pentium? How do you
enter and exit probe mode? All of these topics are discussed in
this article.
The Probe Mode Control Register (PMCR) is
also known as the Debug Mode Control Register (DMCR). Many people
have seen the DMCR listed in Pentium books, but were never told
how to access it. This article not only discloses how to access
it, but how to use it to your advantage.
Magazine article by the illustrious Robert
Collins (me) in the October 1991 issue of Tech Specialist. In the
Annotated Bibliography of Andrew Schulman's book,
Undocumented DOS, Second Edition, Andrew says of this article
"Collins uses an in-circuit emulator (ICE) to take apart
the undocumented LOADALL instruction; an amazingly good
article." Thank you Andrew, I think the same
of your book.
This is an unpublished magazine article I
wrote in 1991. I had originally intended to submit it for
publication in Tech Specialist, but I eventually lost interest.
As I converted the article to hypertext, I was amazed at how
informative I had written it (that many years ago). And with my
current understanding of the x86 architecture, I detected only
one mistake in the article (which I corrected). If you have a
desire to know more about protected mode, or learn protected mode
basics, then you should read this article. It comes complete with
source code, which can be downloaded.
Productivity Enhancements and
Programming Tricks
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Have you ever wondered why your
computer crashes sometimes when you give it the 3-finger
salute? I'll bet this happens to you most often when
you're using some type of memory manager. This article
might explain your problems. But sorry to disappoint you,
it doesn't contain a solution -- except hit that
big red switch.
This file describes anomalies and
inconsistencies with the Descriptor Cache Registers. Source code is
also included. The source code may not be too useful, as
it requires the use of LOADALL.
Unfortunately, LOADALL was removed on the Intel486 and
later processors.
Did you ever wonder why the NULL
descriptor isn't used by the processor? Well, I won't
burst your bubble, I don't know either. But I do what you
can use it for, and it's real handy. System's
programmers, O/S writers, and general nerds, you need to
see this.
Who says old dogs can't learn new
tricks? If you've ever done any reasonable amount of
system's programming, you know the dilemma you have of
writing common source code to get the 80286 and all newer
processors out of protected mode. On one extreme, the
80286 can't get out of protected mode without resetting
the microprocessor. Intel learned from this mistake, and
starting with the 80386 provided a means to gracefully
return from protected mode. But the problem is how to
write common source code which returns both
processors from protected mode, in an efficient manner.
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